2.Combinational Logic Circuit

What is Combonational Logic Circuit ?

Combinational Logic Circuit āĻšāϞ āĻāĻ• āϧāϰāύ⧇āϰ āĻĄāĻŋāϜāĻŋāϟāĻžāϞ āϏāĻžāĻ°ā§āĻ•āĻŋāϟ āϝāĻžāϤ⧇ NAND, NOR, or NOT basic logic āϗ⧇āϟ āϗ⧁āϞāĻŋ āĻĨāĻžāϕ⧇, āϝ⧇āϗ⧁āϞ⧋ āĻāĻŽāύāĻ­āĻžāĻŦ⧇ āϏāĻ‚āϝ⧁āĻ•ā§āϤ āĻĨāĻžāϕ⧇ āϝ⧇ āϤāĻžāϰāĻž āϤāĻžāĻĻ⧇āϰ āχāύāĻĒ⧁āϟ āĻŽāĻžāύ⧇āϰ āϏāĻŽāĻ¨ā§āĻŦāϝāĻŧ⧇āϰ āĻ­āĻŋāĻ¤ā§āϤāĻŋāϤ⧇ āύāĻŋāĻ°ā§āĻĻāĻŋāĻˇā§āϟ āφāωāϟāĻĒ⧁āϟ āϤ⧈āϰāĻŋ āĻ•āϰ⧇āĨ¤ āĻāχ āϏāĻžāĻ°ā§āĻ•āĻŋāϟāϗ⧁āϞāĻŋāϤ⧇ āϕ⧋āύāĻ“ āĻŽā§‡āĻŽāϰāĻŋ āωāĻĒāĻžāĻĻāĻžāύ āύ⧇āχ, āϝāĻžāϰ āĻŽāĻžāύ⧇ āφāωāϟāĻĒ⧁āϟ āĻļ⧁āϧ⧁āĻŽāĻžāĻ¤ā§āϰ āĻŦāĻ°ā§āϤāĻŽāĻžāύ āχāύāĻĒ⧁āϟ āĻŽāĻžāύāϗ⧁āϞāĻŋāϰ āωāĻĒāϰ āύāĻŋāĻ°ā§āĻ­āϰ āĻ•āϰ⧇āĨ¤[Combinational Logic Circuit is a type of digital circuit that consists of NAND, NOR, or NOT logic gates, which are connected in such a way that they produce specific outputs based on the combination of their input values. These circuits do not have any memory elements, which means that the output depends solely on the current input values.]

characteristics of Combinational Logic circuit

āĻŦāĻŋāĻ­āĻŋāĻ¨ā§āύ āϧāϰāύ⧇āϰ āĻ•āĻŽā§āĻŦāĻŋāύ⧇āĻļāύāĻžāϞ āϞāϜāĻŋāĻ• āϏāĻžāĻ°ā§āĻ•āĻŋāϟ āϰāϝāĻŧ⧇āϛ⧇, āϝ⧇āĻŽāύ Adder,Substractor,Multiplexer,Demultiplexer,Decoder, EncoderāĨ¤

  • āϝ⧇āϕ⧋āύ⧋ āĻŽā§āĻšā§‚āĻ°ā§āϤ⧇, āĻ•āĻŽā§āĻŦāĻŋāύ⧇āĻļāύāĻžāϞ āϏāĻžāĻ°ā§āĻ•āĻŋāĻŸā§‡āϰ āφāωāϟāĻĒ⧁āϟ āĻļ⧁āϧ⧁āĻŽāĻžāĻ¤ā§āϰ āĻŦāĻ°ā§āϤāĻŽāĻžāύ āχāύāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞ⧇āϰ āωāĻĒāϰ āύāĻŋāĻ°ā§āĻ­āϰ āĻ•āϰ⧇āĨ¤
  • āĻ•āĻŽā§āĻŦāĻŋāύ⧇āĻļāύāĻžāϞ āϏāĻžāĻ°ā§āĻ•āĻŋāĻŸā§‡āϰ āϕ⧋āύ⧋ āĻŦā§āϝāĻžāĻ•āφāĻĒ āĻŦāĻž āĻĒā§‚āĻ°ā§āĻŦāĻŦāĻ°ā§āϤ⧀ āĻŽā§‡āĻŽāϰāĻŋ āύ⧇āχāĨ¤ āϏāĻžāĻ°ā§āĻ•āĻŋāĻŸā§‡āϰ āĻŦāĻ°ā§āϤāĻŽāĻžāύ āĻ…āĻŦāĻ¸ā§āĻĨāĻž āχāύāĻĒ⧁āĻŸā§‡āϰ āĻĒā§‚āĻ°ā§āĻŦāĻŦāĻ°ā§āϤ⧀ āĻ…āĻŦāĻ¸ā§āĻĨāĻž āĻĻā§āĻŦāĻžāϰāĻž āĻĒā§āϰāĻ­āĻžāĻŦāĻŋāϤ āĻšāϝāĻŧ āύāĻžāĨ¤
  • āĻ•āĻŽā§āĻŦāĻŋāύ⧇āĻļāύāĻžāϞ āϞāϜāĻŋāĻ• āϏāĻžāĻ°ā§āĻ•āĻŋāĻŸā§‡ āχāύāĻĒ⧁āĻŸā§‡āϰ x āϏāĻ‚āĻ–ā§āϝāĻž āĻāĻŦāĻ‚ āφāωāϟāĻĒ⧁āĻŸā§‡āϰ y āϏāĻ‚āĻ–ā§āϝāĻž āϏāĻŽā§āĻ­āĻŦāĨ¤
Combinational Logic Circuit

What is Adder ?

āĻ…ā§āϝāĻžāĻĄāĻžāϰ ( Adder )āĻšāϞ āĻāĻ•āϟāĻŋ āĻĄāĻŋāϜāĻŋāϟāĻžāϞ āϏāĻžāĻ°ā§āĻ•āĻŋāϟ āϝāĻž āĻĻ⧁āϟāĻŋ āĻŦāĻžāχāύāĻžāϰāĻŋ āϏāĻ‚āĻ–ā§āϝāĻž āϝ⧋āĻ— āĻ•āϰ⧇āĨ¤ āĻŦāĻŋāĻ­āĻŋāĻ¨ā§āύ āϧāϰāύ⧇āϰ āĻ…ā§āϝāĻžāĻĄāĻžāϰ āϰāϝāĻŧ⧇āϛ⧇, āϝ⧇āĻŽāύ āĻšāĻžāĻĢ āĻ…ā§āϝāĻžāĻĄāĻžāϰ, āĻĢ⧁āϞ āĻ…ā§āϝāĻžāĻĄāĻžāϰ āĻāĻŦāĻ‚ āϰāĻŋāĻĒāϞ āĻ•ā§āϝāĻžāϰāĻŋ āĻ…ā§āϝāĻžāĻĄāĻžāϰāĨ¤ āĻāĻ–āĻžāύ⧇ āĻšāĻžāĻĢ āĻ…ā§āϝāĻžāĻĄāĻžāϰ āĻāĻŦāĻ‚ āĻĢ⧁āϞ āĻ…ā§āϝāĻžāĻĄāĻžāϰ āϏāĻŽā§āĻĒāĻ°ā§āϕ⧇  āφāϞ⧋āϚāύāĻž āĻ•āϰāĻž āĻšāϞ [Adder in Digital Electronics is a digital circuit that performs the addition of two binary numbers. There are different types of adders, such as Half Adder, Full Adder, and Ripple Carry Adder.  Half Adder and  full adder are discussed here .]

Half Adder

Digital Electronics āĻ āĻšāĻžāĻĢ āĻ…ā§āϝāĻžāĻĄāĻžāϰ (Half Adder) āĻšāϞ āĻāĻ•āϟāĻŋ āĻĄāĻŋāϜāĻŋāϟāĻžāϞ āϏāĻžāĻ°ā§āĻ•āĻŋāϟ āϝāĻž āĻĻ⧁āϟāĻŋ āĻāĻ•āĻ• āĻŦāĻžāχāύāĻžāϰāĻŋ āϏāĻ‚āĻ–ā§āϝāĻžāϰ āϝ⧋āĻ— āĻ•āϰāϤ⧇ āĻĒāĻžāϰ⧇ āĻāĻŦāĻ‚ āĻāĻ•āϟāĻŋ āφāωāϟāĻĒ⧁āϟ Sum  āĻāĻŦāĻ‚ āĻ…āĻĒāϰ āφāωāϟāĻĒ⧁āϟ Carry āĻ‰ā§ŽāĻĒāĻ¨ā§āύ āĻšāϝāĻŧāĨ¤ āĻāϟāĻŋ āĻĻ⧁āϟāĻŋ āχāύāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞ āĻāĻŦāĻ‚ āĻĻ⧁āϟāĻŋ āφāωāϟāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞ āύāĻŋāϝāĻŧ⧇ āĻ—āĻ āĻŋāϤāĨ¤ āφāωāϟāĻĒ⧁āϟ Sum āĻšāϞ āχāύāĻĒ⧁āϟāϗ⧁āϞāĻŋāϰ XOR, āĻāĻŦāĻ‚ āφāωāϟāĻĒ⧁āϟ carry āĻšāϞ āĻĒā§āϰāĻĨāĻŽ  āĻāĻŦāĻ‚ āĻĻā§āĻŦāĻŋāϤ⧀āϝāĻŧ āχāύāĻĒ⧁āĻŸā§‡āϰ AND āĻ…āĻĒāĻžāϰ⧇āĻļāĻžāύāĨ¤ [Half Adder is a digital circuit that can add two single binary digits and produce a Sum and carry output. It consists of two input terminals and two output terminals. The Sum output is the XOR of the inputs, and the Carry output is AND Opreration of first and the second input.] 

half adder
Half Adder
HA: Truth Table
Half Adder: Truth Table

Full Adder

Digital Electronics āĻ Full Adder āĻšāϞ āĻāĻ•āϟāĻŋ āĻĄāĻŋāϜāĻŋāϟāĻžāϞ āϏāĻžāĻ°ā§āĻ•āĻŋāϟ āϝāĻž āĻĻ⧁āϟāĻŋ āĻŦāĻžāχāύāĻžāϰāĻŋ āĻĄāĻŋāϜāĻŋāϟ āĻāĻŦāĻ‚ āĻāĻ•āϟāĻŋ āĻ•ā§āϝāĻžāϰāĻŋ āχāύāĻĒ⧁āϟ āϝ⧋āĻ— āĻ•āϰāϤ⧇ āĻĒāĻžāϰ⧇ āĻāĻŦāĻ‚ āĻāĻ•āϟāĻŋ āϝ⧋āĻ—āĻĢāϞ āĻāĻŦāĻ‚ āĻ•ā§āϝāĻžāϰāĻŋ āφāωāϟāĻĒ⧁āϟ āϤ⧈āϰāĻŋ āĻ•āϰāϤ⧇ āĻĒāĻžāϰ⧇āĨ¤ āĻāϟāĻŋ āϤāĻŋāύāϟāĻŋ āχāύāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞ āĻāĻŦāĻ‚ āĻĻ⧁āϟāĻŋ āφāωāϟāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞ āύāĻŋāϝāĻŧ⧇ āĻ—āĻ āĻŋāϤāĨ¤ āϝ⧋āĻ—āĻĢāϞ āφāωāϟāĻĒ⧁āϟ āĻšāϞ āχāύāĻĒ⧁āϟ āĻāĻŦāĻ‚ āĻ•ā§āϝāĻžāϰāĻŋ āχāύāĻĒ⧁āĻŸā§‡āϰ XOR āĻāĻŦāĻ‚ āĻ•ā§āϝāĻžāϰāĻŋ āφāωāϟāĻĒ⧁āϟ āĻšāϞ āχāύāĻĒ⧁āϟ āĻāĻŦāĻ‚ āĻ•ā§āϝāĻžāϰāĻŋ āχāύāĻĒ⧁āĻŸā§‡āϰ ORāĨ¤ [Full Adder is a digital circuit that can add two binary digits and a carry input and produce a sum and carry output. It consists of three input terminals and two output terminals. The sum output is the XOR of the inputs and the carry input, and the carry output is the OR of the inputs and the carry input.]

Full Adder Truth Table
FA:Circuit

Substractor

Digital Electronics āĻ āϏāĻžāĻŦāĻŸā§āĻ°ā§āϝāĻžāĻ•ā§āϟāϰ( Substractor) āĻšāϞ āĻāĻ•āϟāĻŋ āĻĄāĻŋāϜāĻŋāϟāĻžāϞ āϏāĻžāĻ°ā§āĻ•āĻŋāϟ āϝāĻž āĻĻ⧁āϟāĻŋ āĻŦāĻžāχāύāĻžāϰāĻŋ āϏāĻ‚āĻ–ā§āϝāĻžāϰ āĻŦāĻŋāϝāĻŧā§‹āĻ— āϏāĻŽā§āĻĒāĻžāĻĻāύ āĻ•āϰ⧇āĨ¤ āĻŦāĻŋāĻ­āĻŋāĻ¨ā§āύ āϧāϰāϪ⧇āϰ āĻŦāĻŋāϝāĻŧā§‹āĻ—āĻ•āĻžāϰ⧀ āϰāϝāĻŧ⧇āϛ⧇, āϝ⧇āĻŽāύ āĻšāĻžāĻĢ  āϏāĻžāĻŦāĻŸā§āĻ°ā§āϝāĻžāĻ•ā§āϟāϰ, āĻĢ⧁āϞ āϏāĻžāĻŦāĻŸā§āĻ°ā§āϝāĻžāĻ•ā§āϟāϰ āĻāĻŦāĻ‚ āĻŦā§‹āϰ⧋ āĻŦā§‹āϰ⧋ āϏāĻžāĻŦāĻŸā§āĻ°ā§āϝāĻžāĻ•ā§āϟāϰ āĨ¤ [Subtractor is a digital circuit that performs the subtraction of two binary numbers. There are different types of subtractors, such as Half Subtractor, Full Subtractor, and Borrow Borrow Subtractor.]

Half Substractor

Digital Electronics āĻ āĻšāĻžāĻĢ āϏāĻžāĻŦāĻŸā§āĻ°ā§āϝāĻžāĻ•ā§āϟāϰ(Half Substractor) āĻšāϞ āĻāĻ•āϟāĻŋ āĻĄāĻŋāϜāĻŋāϟāĻžāϞ āϏāĻžāĻ°ā§āĻ•āĻŋāϟ āϝāĻž āĻĻ⧁āϟāĻŋ āĻāĻ•āĻ• āĻŦāĻžāχāύāĻžāϰāĻŋ āϏāĻ‚āĻ–ā§āϝāĻž āĻŦāĻŋāϝāĻŧā§‹āĻ— āĻ•āϰāϤ⧇ āĻĒāĻžāϰ⧇ āĻāĻŦāĻ‚ āĻāĻ•āϟāĻŋ āφāωāϟāĻĒ⧁āϟ Difference  āĻāĻŦāĻ‚ āĻ…āĻĒāϰ āφāωāϟāĻĒ⧁āϟ Borrow āĻ‰ā§ŽāĻĒāĻ¨ā§āύ āĻšāϝāĻŧāĨ¤ āĻāϟāĻŋ āĻĻ⧁āϟāĻŋ āχāύāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞ āĻāĻŦāĻ‚ āĻĻ⧁āϟāĻŋ āφāωāϟāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞ āύāĻŋāϝāĻŧ⧇ āĻ—āĻ āĻŋāϤāĨ¤ āφāωāϟāĻĒ⧁āϟ Difference āĻšāϞ āχāύāĻĒ⧁āϟāϗ⧁āϞāĻŋāϰ XOR, āĻāĻŦāĻ‚ āφāωāϟāĻĒ⧁āϟ Borrow āĻšāϞ āĻĒā§āϰāĻĨāĻŽ āχāύāĻĒ⧁āĻŸā§‡āϰ NOT āĻāĻŦāĻ‚ āĻĻā§āĻŦāĻŋāϤ⧀āϝāĻŧ āχāύāĻĒ⧁āĻŸā§‡āϰ AND āĻ…āĻĒāĻžāϰ⧇āĻļāĻžāύāĨ¤ [Half Subtractor is a digital circuit that can subtract two single binary digits and produce a difference and borrow output. It consists of two input terminals and two output terminals. The difference output is the XOR of the inputs, and the borrow output is the NOT of the first input AND the second input.] 

Full Substractor ?

Digital Electronics āĻ āĻĢ⧁āϞ āϏāĻžāĻŦāĻŸā§āĻ°ā§āϝāĻžāĻ•ā§āϟāϰ (Full Substractor) āĻšāϞ āĻāĻ•āϟāĻŋ āĻĄāĻŋāϜāĻŋāϟāĻžāϞ āϏāĻžāĻ°ā§āĻ•āĻŋāϟ āϝāĻž āĻĻ⧁āϟāĻŋ āĻŦāĻžāχāύāĻžāϰāĻŋ āĻĄāĻŋāϜāĻŋāϟ āĻāĻŦāĻ‚ āĻāĻ•āϟāĻŋ Borrow āχāύāĻĒ⧁āϟ āĻŦāĻŋāϝāĻŧā§‹āĻ— āĻ•āϰāϤ⧇ āĻĒāĻžāϰ⧇ āĻāĻŦāĻ‚ āĻāĻ•āϟāĻŋ āφāωāϟāĻĒ⧁āϟ Difference  āĻāĻŦāĻ‚ āĻ…āĻĒāϰ āφāωāϟāĻĒ⧁āϟ Borrow  āĻ‰ā§ŽāĻĒāĻ¨ā§āύ āĻšāϝāĻŧāĨ¤ āĻāϟāĻŋ āϤāĻŋāύāϟāĻŋ āχāύāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞ āĻāĻŦāĻ‚ āĻĻ⧁āϟāĻŋ āφāωāϟāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞ āύāĻŋāϝāĻŧ⧇ āĻ—āĻ āĻŋāϤāĨ¤[Full Subtractor is a digital circuit that can subtract two binary digits and a borrow input and produce a difference and borrow output. It consists of three input terminals and two output terminals. ]

Multiplexer

āĻŽāĻžāĻ˛ā§āϟāĻŋāĻĒā§āϞ⧇āĻ•ā§āϏāĻžāϰ āĻšāϞ āĻāĻ•āϟāĻŋ āĻĄāĻŋāϜāĻŋāϟāĻžāϞ āϏāĻžāĻ°ā§āĻ•āĻŋāϟ āϝāĻž āĻ…āύ⧇āĻ• āχāύāĻĒ⧁āϟ āϏāĻŋāĻ—āĻ¨ā§āϝāĻžāϞ⧇āϰ āĻŽāĻ§ā§āϝ⧇ āĻāĻ•āϟāĻŋ āύāĻŋāĻ°ā§āĻŦāĻžāϚāύ āĻ•āϰāϤ⧇ āĻĒāĻžāϰ⧇ āĻāĻŦāĻ‚ āĻāϟāĻŋāϕ⧇ āφāωāϟāĻĒ⧁āĻŸā§‡ āĻĒā§āϰ⧇āϰāĻŖ āĻ•āϰāϤ⧇ āĻĒāĻžāϰ⧇āĨ¤ āĻāϟāĻŋ āĻāĻ•āĻžāϧāĻŋāĻ• āχāύāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞ, āĻāĻ•āϟāĻŋ āϏāĻŋāϞ⧇āĻ•ā§āϟ āχāύāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞ āĻāĻŦāĻ‚ āĻāĻ•āϟāĻŋ āφāωāϟāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞ āύāĻŋāϝāĻŧ⧇ āĻ—āĻ āĻŋāϤāĨ¤ āϏāĻŋāϞ⧇āĻ•ā§āϟ āχāύāĻĒ⧁āϟ āύāĻŋāĻ°ā§āϧāĻžāϰāĻŖ āĻ•āϰ⧇ āϕ⧋āύ āχāύāĻĒ⧁āϟ āϏāĻŋāĻ—āĻ¨ā§āϝāĻžāϞāϟāĻŋ āφāωāϟāĻĒ⧁āĻŸā§‡ āϝāĻžāĻŦ⧇āĨ¤[Multiplexer is a digital circuit that can select one of many input signals and pass it through to the output. It consists of multiple input terminals, a select input terminal, and an output terminal. The select input determines which input signal is passed through to the output.]

Example: 4×1 MUX

4×1 āĻŽāĻžāĻ˛ā§āϟāĻŋāĻĒā§āϞ⧇āĻ•ā§āϏāĻžāϰ⧇, āĻŽā§‹āϟ āϚāĻžāϰāϟāĻŋ āχāύāĻĒ⧁āϟ āϰāϝāĻŧ⧇āϛ⧇, āϝ⧇āĻŽāύ, I0, I1, I2,, āĻāĻŦāĻ‚ I3, 2āϟāĻŋ āύāĻŋāĻ°ā§āĻŦāĻžāϚāύ āϞāĻžāχāύ(Selection line), āϝ⧇āĻŽāύ, S0 āĻāĻŦāĻ‚ S1 āĻāĻŦāĻ‚ āĻāĻ•āĻ• āφāωāϟāĻĒ⧁āϟ, āĻ…āĻ°ā§āĻĨāĻžā§Ž, Y. āĻāϰ āϏāĻŽāĻ¨ā§āĻŦāϝāĻŧ⧇āϰ āĻ­āĻŋāĻ¤ā§āϤāĻŋāϤ⧇ āϝ⧇ āχāύāĻĒ⧁āϟāϗ⧁āϞāĻŋ āύāĻŋāĻ°ā§āĻŦāĻžāϚāύ āϞāĻžāχāύ S0 āĻāĻŦāĻ‚ S1 āĻ āωāĻĒāĻ¸ā§āĻĨāĻŋāϤ āĻĨāĻžāϕ⧇, āĻāχ 4āϟāĻŋ āχāύāĻĒ⧁āĻŸā§‡āϰ āĻŽāĻ§ā§āϝ⧇ āĻāĻ•āϟāĻŋ āφāωāϟāĻĒ⧁āĻŸā§‡āϰ āϏāĻžāĻĨ⧇ āϏāĻ‚āϝ⧁āĻ•ā§āϤ āĻĨāĻžāϕ⧇āĨ¤ 4×1 āĻŽāĻžāĻ˛ā§āϟāĻŋāĻĒā§āϞ⧇āĻ•ā§āϏāĻžāϰ⧇āϰ āĻŦā§āϞāĻ• āĻĄāĻžāϝāĻŧāĻžāĻ—ā§āϰāĻžāĻŽ āĻāĻŦāĻ‚ āϏāĻ¤ā§āϝ āϏāĻžāϰāĻŖā§€ āύāĻŋāĻšā§‡ āĻĻ⧇āĻ“āϝāĻŧāĻž āĻšāϞāĨ¤ [In the 4×1 multiplexer, there is a total of four inputs, i.e., I0, I1, I2, and I3, 2 selection lines, i.e., S0 and S1 and single output, i.e., Y. On the basis of the combination of inputs that are present at the selection lines S0 and S1 , one of these 4 inputs are connected to the output. The block diagram and the truth table of the 4×1 multiplexer are given below.] 

4X1 MUX
4X1 MUX:Truth Table

āωāĻĒāϰ⧇āϰ āϏāĻ¤ā§āϝ āϏāĻžāϰāĻŖā§€ āĻ…āύ⧁āϝāĻžāϝāĻŧā§€ āφāωāϟāĻĒ⧁āϟ āĻāϰ āϞāϜāĻŋāĻ• āĻāĻ•ā§āϏāĻĒā§āϰ⧇āĻļāύ āĻšāϞ  [According to above truth table logic exoression of output y is]- Y=S1′ S0′ I0+S1′ S0 I1+S1 S0′ I2+S1 S0 I3

Demultiplexer

Demultiplexer āĻšāϞ āĻāĻ•āϟāĻŋ āĻĄāĻŋāϜāĻŋāϟāĻžāϞ āϏāĻžāĻ°ā§āĻ•āĻŋāϟ āϝāĻž āĻāĻ•āϟāĻŋ āχāύāĻĒ⧁āϟ āϏāĻŋāĻ—āĻ¨ā§āϝāĻžāϞ āύāĻŋāϤ⧇ āĻĒāĻžāϰ⧇ āĻāĻŦāĻ‚ āĻāĻ•āĻžāϧāĻŋāĻ• āφāωāϟāĻĒ⧁āϟ āϏāĻŋāĻ—āĻ¨ā§āϝāĻžāϞ⧇ āĻŦāĻŋāϤāϰāĻŖ āĻ•āϰāϤ⧇ āĻĒāĻžāϰ⧇āĨ¤ āĻāϟāĻŋ āĻāĻ•āϟāĻŋ āχāύāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞ, āĻāĻ•āĻžāϧāĻŋāĻ• āύāĻŋāĻ°ā§āĻŦāĻžāϚāĻŋāϤ(select) āχāύāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞ āĻāĻŦāĻ‚ āĻāĻ•āĻžāϧāĻŋāĻ• āφāωāϟāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞ āύāĻŋāϝāĻŧ⧇ āĻ—āĻ āĻŋāϤāĨ¤ āύāĻŋāĻ°ā§āĻŦāĻžāϚāĻŋāϤ(select)āχāύāĻĒ⧁āϟāϗ⧁āϞāĻŋ āύāĻŋāĻ°ā§āϧāĻžāϰāĻŖ āĻ•āϰ⧇ āϝ⧇ āϕ⧋āύ āφāωāϟāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞ⧇ āχāύāĻĒ⧁āϟ āϏāĻ‚āϕ⧇āϤāϟāĻŋ āĻĒāĻžāϏ āĻ•āϰāĻž āĻšāϝāĻŧ⧇āϛ⧇āĨ¤[Demultiplexer is a digital circuit that can take one input signal and distribute it to multiple output signals. It consists of one input terminal, multiple select input terminals, and multiple output terminals. The select inputs determine which output terminal the input signal is passed through to.]

Exmaple: 1×4 DEMUX:

1×4 āĻĄāĻŋ-āĻŽāĻžāĻ˛ā§āϟāĻŋāĻĒā§āϞ⧇āĻ•ā§āϏāĻžāϰ⧇, āĻŽā§‹āϟ āϚāĻžāϰāϟāĻŋ āφāωāϟāĻĒ⧁āϟ āϰāϝāĻŧ⧇āϛ⧇, āϝ⧇āĻŽāύ, D0, D1, D2, āĻāĻŦāĻ‚ D3, 2āϟāĻŋ āύāĻŋāĻ°ā§āĻŦāĻžāϚāύ āϞāĻžāχāύ(selection line), āϝ⧇āĻŽāύ, S0 āĻāĻŦāĻ‚ S1 āĻāĻŦāĻ‚ āĻāĻ•āϟāĻŋ āχāύāĻĒ⧁āϟ, āĻ…āĻ°ā§āĻĨāĻžā§Ž, I. āĻāϰ āϏāĻŽāĻ¨ā§āĻŦāϝāĻŧ⧇āϰ āĻ­āĻŋāĻ¤ā§āϤāĻŋāϤ⧇ āϝ⧇ āχāύāĻĒ⧁āϟāϗ⧁āϞāĻŋ āύāĻŋāĻ°ā§āĻŦāĻžāϚāύ āϞāĻžāχāύ S0 āĻāĻŦāĻ‚ S1 āĻ āωāĻĒāĻ¸ā§āĻĨāĻŋāϤ āĻĨāĻžāϕ⧇, āχāύāĻĒ⧁āϟāϟāĻŋ āφāωāϟāĻĒ⧁āĻŸā§‡āϰ āĻāĻ•āϟāĻŋāϰ āϏāĻžāĻĨ⧇ āϏāĻ‚āϝ⧁āĻ•ā§āϤ āĻĨāĻžāϕ⧇āĨ¤ 1×4 āĻŽāĻžāĻ˛ā§āϟāĻŋāĻĒā§āϞ⧇āĻ•ā§āϏāĻžāϰ⧇āϰ āĻŦā§āϞāĻ• āĻĄāĻžāϝāĻŧāĻžāĻ—ā§āϰāĻžāĻŽ āĻāĻŦāĻ‚ āϏāĻ¤ā§āϝ āϏāĻžāϰāĻŖā§€ āύ⧀āĻšā§‡ āĻĻ⧇āĻ“āϝāĻŧāĻž āĻšāϞāĨ¤

āωāĻĒāϰ⧇āϰ āϏāĻ¤ā§āϝ āϏāĻžāϰāĻŖā§€ āĻ…āύ⧁āϝāĻžāϝāĻŧā§€ āφāωāϟāĻĒ⧁āϟ āĻāϰ āϞāϜāĻŋāĻ• āĻāĻ•ā§āϏāĻĒā§āϰ⧇āĻļāύ āĻšāϞ [According to above truth table logic exoression of output is]-

D0=S0‘S1‘I
D1=SS1‘ I
D2=S0‘ SI
D3=SSI

Decoder & Decoding

āĻĄāĻŋāϕ⧋āĻĄāĻžāϰ āĻšāϞ āĻāĻ•āϟāĻŋ āĻĄāĻŋāϜāĻŋāϟāĻžāϞ āϏāĻžāĻ°ā§āĻ•āĻŋāϟ āϝāĻž āĻāĻ•āϟāĻŋ āĻŦāĻžāχāύāĻžāϰāĻŋ āχāύāĻĒ⧁āϟ āύāĻŋāϤ⧇ āĻĒāĻžāϰ⧇ āĻāĻŦāĻ‚ āχāύāĻĒ⧁āϟ āĻŽāĻžāύ⧇āϰ āωāĻĒāϰ āĻ­āĻŋāĻ¤ā§āϤāĻŋ āĻ•āϰ⧇ āĻ…āύ⧇āĻ• āφāωāϟāĻĒ⧁āϟ āϏāĻ‚āϕ⧇āϤ⧇āϰ āĻŽāĻ§ā§āϝ⧇ āĻāĻ•āϟāĻŋ āϏāĻ‚āϕ⧇āϤ āϕ⧇ āϏāĻ•ā§āϰāĻŋāϝāĻŧ āĻ•āϰāϤ⧇ āĻĒāĻžāϰ⧇āĨ¤ āĻāϟāĻŋ āĻāĻ•āĻžāϧāĻŋāĻ• āχāύāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞ āĻāĻŦāĻ‚ āĻāĻ•āĻžāϧāĻŋāĻ• āφāωāϟāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞ āύāĻŋāϝāĻŧ⧇ āĻ—āĻ āĻŋāϤāĨ¤ āχāύāĻĒ⧁āϟ āĻŽāĻžāύ⧇āϰ āϏāĻžāĻĨ⧇ āϏāĻŽā§āĻĒāĻ°ā§āĻ•āĻŋāϤ āφāωāϟāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞ āϏāĻ•ā§āϰāĻŋāϝāĻŧ āĻšāϝāĻŧ, āĻ…āĻ¨ā§āϝ āϏāĻŽāĻ¸ā§āϤ āφāωāϟāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞ āύāĻŋāĻˇā§āĻ•ā§āϰāĻŋāϝāĻŧ āĻĨāĻžāϕ⧇āĨ¤ [Decoder is a digital circuit that can take a binary input and activate one of many output signals based on the input value. It consists of multiple input terminals and multiple output terminals. The output terminal that corresponds to the input value is activated, while all other output terminals remain inactive.]

Example: 2×4 decoder

2×4 āϞāĻžāχāύ⧇āϰ āĻĄāĻŋāϕ⧋āĻĄāĻžāϰ⧇, āĻŽā§‹āϟ āϤāĻŋāύāϟāĻŋ āχāύāĻĒ⧁āϟ āϰāϝāĻŧ⧇āϛ⧇, āϝ⧇āĻŽāύ, I0, āĻāĻŦāĻ‚ I1 āĻāĻŦāĻ‚ E āĻāĻŦāĻ‚ āϚāĻžāϰāϟāĻŋ āφāωāϟāĻĒ⧁āϟ, āϝ⧇āĻŽāύ, D0, D1, D2 āĻāĻŦāĻ‚ D3āĨ¤ āχāύāĻĒ⧁āϟāϗ⧁āϞāĻŋāϰ āĻĒā§āϰāϤāĻŋāϟāĻŋ āϏāĻ‚āĻŽāĻŋāĻļā§āϰāϪ⧇āϰ āϜāĻ¨ā§āϝ, āϝāĻ–āύ āϏāĻ•ā§āώāĻŽ ‘E’ 1 āϤ⧇ āϏ⧇āϟ āĻ•āϰāĻž āĻšāϝāĻŧ, āϤāĻ–āύ āĻāχ āϚāĻžāϰāϟāĻŋ āφāωāϟāĻĒ⧁āĻŸā§‡āϰ āĻŽāĻ§ā§āϝ⧇ āĻāĻ•āϟāĻŋ āĻšāĻŦ⧇ 1āĨ¤ āĻŦā§āϞāĻ• āĻĄāĻžāϝāĻŧāĻžāĻ—ā§āϰāĻžāĻŽ āĻāĻŦāĻ‚ 2 āĻĨ⧇āϕ⧇ 4 āϞāĻžāχāύ⧇āϰ āĻĄāĻŋāϕ⧋āĻĄāĻžāϰ⧇āϰ āϏāĻ¤ā§āϝ āϏāĻžāϰāĻŖā§€ āύ⧀āĻšā§‡ āĻĻ⧇āĻ“āϝāĻŧāĻž āĻšāϝāĻŧ⧇āϛ⧇āĨ¤

Decode: Block Dig

āωāĻĒāϰ⧇āϰ āϏāĻ¤ā§āϝ āϏāĻžāϰāĻŖā§€ āĻ…āύ⧁āϝāĻžāϝāĻŧā§€ āφāωāϟāĻĒ⧁āϟ āĻāϰ āϞāϜāĻŋāĻ• āĻāĻ•ā§āϏāĻĒā§āϰ⧇āĻļāύ āĻšāϞ [According to above truth table logic exoression of output is]-

D3=E.I1.I0

D2=E.I1.I0

D1=E.I1‘.I0

D0=E.I1‘.I0

Encoder & Encoding

āĻāύāϕ⧋āĻĄāĻžāϰ āĻšāϞ āĻāĻ•āϟāĻŋ āĻĄāĻŋāϜāĻŋāϟāĻžāϞ āϏāĻžāĻ°ā§āĻ•āĻŋāϟ āϝāĻž āĻāĻ•āĻžāϧāĻŋāĻ• āχāύāĻĒ⧁āϟ āϏāĻŋāĻ—āĻ¨ā§āϝāĻžāϞ āύāĻŋāϤ⧇ āĻĒāĻžāϰ⧇ āĻāĻŦāĻ‚ āϏ⧇āϗ⧁āϞāĻŋāϕ⧇ āĻāĻ•āĻ• āĻŦāĻžāχāύāĻžāϰāĻŋ āφāωāϟāĻĒ⧁āϟ āϏāĻŋāĻ—āĻ¨ā§āϝāĻžāϞ⧇ āϰ⧂āĻĒāĻžāĻ¨ā§āϤāϰ āĻ•āϰāϤ⧇ āĻĒāĻžāϰ⧇āĨ¤ āĻāϟāĻŋ āĻāĻ•āĻžāϧāĻŋāĻ• āχāύāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞ āĻāĻŦāĻ‚ āĻāĻ•āϟāĻŋ āĻāĻ•āĻ• āφāωāϟāĻĒ⧁āϟ āϟāĻžāĻ°ā§āĻŽāĻŋāύāĻžāϞ āύāĻŋāϝāĻŧ⧇ āĻ—āĻ āĻŋāϤāĨ¤ āχāύāĻĒ⧁āϟ āϏāĻŋāĻ—āĻ¨ā§āϝāĻžāϞ⧇āϰ āĻŦāĻžāχāύāĻžāϰāĻŋ āĻŽāĻžāύ āφāωāϟāĻĒ⧁āϟ āϏāĻŋāĻ—āĻ¨ā§āϝāĻžāϞ⧇āϰ āϜāĻ¨ā§āϝ āĻāĻ•āϟāĻŋ āĻŦāĻžāχāύāĻžāϰāĻŋ āĻŽāĻžāύ⧇ āϰ⧂āĻĒāĻžāĻ¨ā§āϤāϰāĻŋāϤ āĻšāϝāĻŧāĨ¤ [Encoder is a digital circuit that can take multiple input signals and convert them into a single binary output signal. It consists of multiple input terminals and a single output terminal. The binary value of the input signals is converted into a binary value for the output signal.]

āωāĻĒāϰ⧇āϰ āϏāĻ¤ā§āϝ āϏāĻžāϰāĻŖā§€ āĻ…āύ⧁āϝāĻžāϝāĻŧā§€ āφāωāϟāĻĒ⧁āϟ āĻāϰ āϞāϜāĻŋāĻ• āĻāĻ•ā§āϏāĻĒā§āϰ⧇āĻļāύ āĻšāϞ [According to above truth table logic exoression of output is]-

E2=I4+I5+I6+I7
E1=I2+i3+I6+I7
E0=I7+I5+I3+I1

Encoder:Circuit

Sequential Logic Circuit >>

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